SM5166AV

NIPPON PRECISION CIRCUITS—2

BLOCK DIAGRAM

PIN DESCRIPTION

Number

Name

I/O

Description

1

XIN

I

Reference frequency divider crystal (oscillator) connection pins. Alternatively, an external clock input can

be connected to XIN. The clock is also output on XOUT.

Feedback resistor built-in for AC-coupled inputs.

2

XOUT

O

3

VDD2

–

Phase detector, charge pump and boost-up signal 3 V supply

4

DB

O

boost-up signal output for faster locking

5DO

O

Phase detector output pin.

Built-in charge pump and tristate output means that this output can be connected to a low-pass filter.

The output polarity is preset for connection to a passive filter.

6

VSS

–

Ground pin

7

FIN

I

Operating frequency divider input pin.

Feedback resistor built-in for AC-coupled inputs.

8

VDD1

–

Reference frequency and operating frequency prescaler and counter 1 V supply

9

NC

–

No connection

10

LD

O

Unlock signal output pin. (Unlocked when HIGH)

The function of LD can be turned OFF using the LD input control bit (LD should be tied LOW when not

used).

11

CLK

I

Control data clock input pin

12

DATA

I

Control data input pin

13

LE

I

Control data latch enable signal input pin

14

OPR

I

Power-save control pin.

Start when HIGH, standby mode when LOW.

15

NC

–

No connection

16

TEST

I

Test pin.

Pull-down resistor built-in. Leave open or connect to ground for normal operation.

13 BIT

R COUNTER

PHASE

DETECTOR

LOCK

DETECTOR

CHARGE

PUMP

16 BIT

N COUNTER

VDD1

DATA

LD

VSS

XOUT

LE

CLK

TEST

DB

DO

16 BIT LATCH

14 BIT LATCH

16 BIT

SHIFT REGISTER

XIN

1/8

PRESCALER

VDD1

AREA

VDD2

AREA

VDD1

AREA

VDD2

BOOSTER

S. G.

LATCH

SELECTOR

FIN

WINDOW

GENERATOR

OPR

LEVEL

SHIFTER

LEVEL

SHIFTER

LEVEL

SHIFTER