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ACE9030M/IW/FP2Q 数据表(PDF) 9 Page - Mitel Networks Corporation

部件名 ACE9030M/IW/FP2Q
功能描述  Radio Interface and Twin Synthesiser
PDF  39 Pages
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制造商  MITEL [Mitel Networks Corporation]
网页  http://www.mitel.com
标志 MITEL - Mitel Networks Corporation

ACE9030M/IW/FP2Q 数据表(HTML) 9 Page - Mitel Networks Corporation

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ACE9030
9
ELECTRICAL CHARACTERISTICS
These characteristics apply over these ranges of conditions (unless otherwise stated):
T
AMB = – 40 °C to + 85 °C, all VDD = + 3·6 to + 5·0 V, GND ref. = VSS
A.C. Characteristics (continued)
Note
8. To simplify single ended drive there is a resistor between FIA and FIAB and another between FIM and FIMB. In this mode the inputs should
drive FIA or FIM with D.C. coupling and the other inputs FIAB and FIMB should be decoupled to ground by external capacitors.
Parameter
Min.
Typ.
Max.
Unit
Conditions
LO2 Multiplier
Amplitude
235
500
mV
rms
Circuit as in fig. 15,
Reference frequency content of output
-10.5
dBc
2nd, 4th harmonic content of output
-13.5
dBc
5th harmonic of output
-15
dBc
6th and higher harmonics in output
-20
dBc
SYNTHESISERS
Reference divider
Reference divider input frequency
5
30
MHz
Drive level into CIN1 from external oscillator
400
mV
pk-pk
With crystal oscillator
powered down
CIN1 input capacitance
10
pF
CIN1 input resistance
10
k
Ω
Auxiliary synthesiser
FIA input frequency
10
135
MHz
May be a sinewave
Rise and fall times of inputs
10
ns
Timing Skew between FIA and FIAB
± 2
ns
See Fig. 6
or
± 10%
signal Both maxima
period must be met
FIA, FIAB differential signal level with both
180
mV
pk-pk
Each input, 5 to 50 &
sides driven
99 to 135 MHz
100
mV
pk-pk Each input,
50 to 99 MHz
FIA single input drive level with FIAB
360
mV
pk-pk
One input, 5 to 50 &
decoupled to V
SS
99 to 135 MHz
200
mV
pk-pk
One input,
50 to 99 MHz
FIA, FIAB common mode range
V
DD – 1·7
V
DD – 0·7
V
V
DD = 3.6V
FIA, FIAB common mode range
2.8
V
DD – 0·85
V
V
DD = 5V
FIA, FIAB input capacitance
10
pF
FIA, FIAB differential input resistance
10
k
Ω
Note 8
Auxiliary Synthesiser comparison frequency
2
MHz
Main Synthesiser
FIM input frequency
4
20
MHz
Rise and fall times of inputs
50
ns
FIM - FIMB Timing Skew
± 2
ns
See Fig. 6
or
± 10%
signal Both maxima
period must be met
FIM, FIMB differential signal level
100
mV
pk-pk
Each input,
with both sides driven.
4 to 20 MHz
FIM single input drive level
200
1000
mV
pk-pk
One input,
with FIMB decoupled to V
SS
4 to 20 MHz
FIM, FIMB common mode range
V
DD – 1·7
V
DD – 0·7
V
V
DD =3.6V
FIM, FIMB common mode range
2·8
V
DD – 0·85
V
V
DD =5V
FIM, FIMB input capacitance
10
pF
FIM, FIMB differential input resistance
10
k
Ω
Note 8
Delay FIM rising to MODMP/MODMN changing
30
ns
Main Synthesiser comparison frequency
2
MHz



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