MT8985

2-46

Figure 2 - Pin Connections

Pin Description

Pin #

Name

Description

40

DIP

44

PLCC

44

QFP

12

40

DTA

Data Acknowledgement (Open Drain Output). This active low output indicates that

a data bus transfer is complete. A pull-up resistor is required at this output.

2-9

3-5

7-11

41-43

1-5

STi0-

STi7

ST-BUS Input 0 to 7 (Inputs). Serial data input streams. These streams have 32

channels at data rates of 2.048 Mbit/s.

10

12

6

+5 Volt Power Supply rail.

11

13

7

F0i

Frame Pulse (Input): This input accepts and automatically identifies frame

synchronization signals formatted according to different backplane specifications

such as ST-BUS and GCI.

12

14

8

C4i

Clock (Input). 4.096 MHz serial clock for shifting data in and out of the data streams.

13-18 15-17

19-21

9-11

13-15

A0-A5 Address 0 to 5 (Inputs). These lines provide the address to MT8985 internal

registers.

19

22

16

DS

Data Strobe (Input). This is the input for the active high data strobe on the

microprocessor interface. This input operates with CS to enable the internal read and

write generation.

20

23

17

R/W

Read/Write (Input). This input controls the direction of the data bus lines (D0-D7)

during a microprocessor access.

DTA

STi0

STi1

STi2

STi3

STi4

STi5

STi6

STi7

VDD

F0i

C4i

A0

A1

A2

A3

A4

A5

DS

CSTo

ODE

STo0

STo1

STo2

STo3

STo4

STo5

STo6

STo7

VSS

D0

D1

D2

D3

D4

D5

D6

D7

CS

1

6 5 4 3 2

444342 41 40

7

8

9

10

11

12

13

14

15

16

39

38

37

36

35

34

33

32

31

30

23

1819 20 21 22

24 25 26 27 28

17

29

STi3

STi4

STi5

STi6

STi7

VDD

F0i

C4i

A0

A1

A2

STo3

STo4

STo5

STo6

STo7

VSS

D0

D1

D2

D3

D4

40 PIN PLASTIC DIP

44 PIN PLCC

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

1

R/W

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

1

2

3

4

5

6

7

8

9

10

33

32

31

30

29

28

27

26

25

24

11

23

44 PIN QFP

STi3

STi4

STi5

STi6

STi7

VDD

F0i

C4i

A0

A1

A2

STo3

STo4

STo5

STo6

STo7

VSS

D0

D1

D2

D3

D4