LSI

LS3321

3

Address 1H:0H forms a 8bit address for indirect read/write operation for pointer read/write.

Address 3H:2H forms a 8bit address for indirect read/write operation for pointer1 read/write.

Indirect address is specified, for example, as rINC #op

Indirect Operand (#op)

Resulting address

#0

RptrH.RptrL

#1

RptrH.Rptr1L

#2

Rptr1H.RptrL

#3

Rptr1H.Rptr1L

5. Buzzer Control

The system can output 4khz/2khz alarm signal by mask option. The alarm signal is enabled to the

output BD[0:1] when the Beep Control Register: Bit[0] is high.

6. Timer/Counter

The 3321 has a 4 bit timer/counter. It is map to address CH and DH.

Address

Description

CH(read)

Timer 1 Value

CH(write)

Timer 1 Data

DH(write)

D3

1=START

0=STOP

No. use

D1(tone)

1=FOSC

0=PHI12

D1(timer)

1=XINP0

0=F1HZ

D0

1=tone

0=buz