PDSP1601MC datasheet(2/18 Pages) MITEL

2 / 18 page

PDSP1601 MC

Symbol

MSB

MSS

B15 - B0

CEB

CLK

MSA0 - MSA1

A15 - A0

CEA

MSC

IS0 - IS3

SV0 - SV3

SVOE

RS0, RS1

RS2

C0 - C15

BFP

RA0 - RA2

IA0 - IA3

IA4

Vcc

GND

Description

ALU B-input multiplexer select control.1 This input is latched internally on the rising edge

of CLK.

Shifter Input multiplexer select control.1 This input is latched internally on the rising edge

of CLK.

B Port data Input. Data presented to this port is latched into the input register on the rising

edge of CLK. B15 is the MSB.

Clock enable, B Port input register. When low the clock to this register is enabled.

Common clock to all internal registered elements.

All registers are loaded, and outputs

change on the rising edge of CLK.

ALU A-input multiplexer select control.1 This input are latched internally on the rising edge

of CLK.

A Port data Input. Data presented to this port is latched into the input register on the rising

edge of CLK. B15 is the MSB.

Clock enable, A Port input register. When low the clock to this register is enabled.

C-Port multiplexer select control.1 This input is latched internally on the rising edge

of CLK.

Instruction inputs to Barrel Shifter, IS3 = MSB.1 This input is latched internally on the

rising edge of CLK.

Shift Value I/O Port. This port is used as an input when shift values are supplied form

external sources, and as an output when Normalise operations are invoked. The I/O functions

are determined by the IS0 - IS3 instruction inputs, and by the

SVOE control.

The shift value is latched internally on the rising edge of CLK.

SV Output enable. When high the SV port can only operate as an input. When low the SV

port can act as an input or as an output, according to the IS0 - IS3 instruction. This pin should

be tied high or low, depending upon the application.

Instruction inputs to Barrel Shifter registers.1 These input are latched internally on the

rising edge of CLK.

C Port data output. Data output on this port is selected by the C output multiplexer.

C15 is the MSB

Output enable. The C Port outputs are in high impedance condition when this control is high

Block Floating Point Flag from ALU, active high.

Carry out from MSB of ALU

Instruction inputs to ALU registsers.1 These inputs are latched interally on the rising

edge of CLK.

Carry in to LSB of ALU

Instruction inputs to ALU.1 IA4 = MSB. These inputs are latched internally on the rising

edge of CLK.

+5V supply: Both Vcc pins must be connected.

0V supply: Both GND pins must be connected.

PIN DESCRIPTIONS

18 - 25

30 - 37

41 - 42

43 - 50

55 - 62

65 - 68

69 - 72

74 - 75

82 - 98

100

7 - 9

11 - 14

80, 5

90 & 40

Pin No.

(GG100

Package)

NOTES

All instructions are executed in the cycle commencing with the rising edge of the CLK which latches the inputs.

PDSP1601MC 数据表(PDF) 2 Page - Mitel Networks Corporation

PDSP1601MC 数据表(HTML) 2 Page - Mitel Networks Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

数据表下载

链接网址

PDSP1601MC 数据表(PDF) 2 Page - Mitel Networks Corporation

PDSP1601MC 数据表(HTML) 2 Page - Mitel Networks Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

数据表 下载

链接网址

数据表下载