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SA8281MP1S 数据表(PDF) 2 Page - Mitel Networks Corporation

部件名 SA8281MP1S
功能描述  Three-Phase PWM Waveform Generator
PDF  14 Pages
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制造商  MITEL [Mitel Networks Corporation]
网页  http://www.mitel.com
标志 MITEL - Mitel Networks Corporation

SA8281MP1S 数据表(HTML) 2 Page - Mitel Networks Corporation

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SA828
2
>4·5
<0·2
<10
5·0
Input high voltage
Input low voltage
Input leakage current
Output high voltage
Output low voltage
Supply current (static)
Supply current (dynamic)
Supply voltage
VIN = VSS or VDD
IOH = – 12mA
IOL = 12mA
All outputs open circuit
fCLK = 10MHz
VIH
VIL
IIN
VOH
VOL
IDD (static)
IDD (dynamic)
VDD
2
4·0
4·5
0·8
10
0·4
100
20
5·5
Typ. Max.
Min.
Value
Characteristic
Symbol
Conditions
Units
ELECTRICAL CHARACTERISTICS
These characteristics are guaranteed over the following conditions (unless otherwise stated):
VDD = +5V ±5%, T
AMB = +25°C
DC Characteristics
V
V
µA
V
V
µA
mA
V
-
2/fCLK
2/fCLK
Clock frequency
Clock duty cycle
SET TRIP = 1
→ outputs tripped
→TRIP = 0
M : S ratio = 1 : 1
±20%
fCLK in MHz
fCLK in MHz
fCLK
DCLK
tTRIP
12·5
60
3/fCLK
3/fCLK
MHz
%
µs
µs
NOTE 1. For microprocessor interface timings, see Intel and Motorola bus timings (Tables 1 and 2).
Conditions
Typ. Max.
Characteristic
Symbol
Units
Value
AC Characteristics
ABSOLUTE MAXIMUM RATINGS
Supply voltage, VDD
Voltage on any pin
Current through any I/O pin
Storage temperature
Operating temperature range
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
Name
AD3
AD4
AD5
AD6
AD7
Intel: WR
Motorola: R/W
Intel: RD
Motorola: DS
Intel: ALE
Motorola: AS
RST
CLK
CS
TRIP
Type
I
I
I
I
I
I
I
I
I
I
I
O
Function
Multiplexed Address/Data
Multiplexed Address/Data
Multiplexed Address/Data
Multiplexed Address/Data
Multiplexed Address/Data(MSB)
Intel bus control: Write Strobe
Motorola bus control: Read/Write
select
Intel bus control: Read Strobe
Motorola bus control: Data Strobe
Intel bus control: Address Latch
Enable
Motorola bus control: Address
Strobe
Reset internal counters, active low
Clock input
Chip Select input, active low
Output trip status; low = output tripped
Name
RPHB
YPHB
BPHB
VSS
BPHT
YPHT
SET TRIP
RPHT
WSS
ZPPR
ZPPY
ZPPB
VDD
AD0
AD1
AD2
Pin
No.
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Type
O
O
O
P
O
O
I
O
O
O
O
O
P
I
I
I
Function
Red Phase, Bottom power switch
Yellow Phase, Bottom power switch
Blue Phase, Bottom power switch
Negative power supply (0V)
Blue Phase, Top power switch
Yellow Phase, Top power switch
Set output trip. 120k
Ω internal
pull-up resistor
Red Phase, Top power switch
Waveform Sampling Synchronisation
Zero Phase Pulse, Red phase
Zero Phase Pulse, Yellow phase
Zero Phase Pulse, Blue phase
Positive power supply
Multiplexed Address/Data (LSB)
Multiplexed Address/Data
Multiplexed Address/Data
PIN DESCRIPTIONS
The temperature ranges quoted apply to all package types.
Many package types are available and extended temperature
7V
VSS –0·3V to VDD +0·3V
±10mA
–65
°C to +125°C
–40
°C to +85°C
40
ranges can be offered for some. Further information is available
on request.
Stresses above those listed in the Absolute Maximum
Ratings may cause permanent damage to the device. These
are stress ratings only and functional operation of the device at
these conditions, or at any other condition above those indicated
in the operations section of this specification, is not implied.
Exposure to Absolute Maximum Rating conditions for extended
periods may affect device reliability.



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