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VT82885 数据表(PDF) 12 Page - List of Unclassifed Manufacturers |
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VT82885 数据表(HTML) 12 Page - List of Unclassifed Manufacturers |
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12 / 16 page ![]() 12 VT82885 Real Time Clock VIA Technologies, Inc. Pulse Width, DS/E High or RD/WR# Low PWEH 125 ns Input Rise and Fall Time tR, tF 30 ns R/W# Hold Time tRWH 10 ns R/W# Setup Time before DS/E tRWS 50 ns Chip Select Setup Time before DS, WR#, or RD# tCS 20 ns Chip Select Hold Time tCH 0ns Read Data Hold Time tDHR 10 80 ns Write Data Hold Time tDHW 0 Muxed Address Valid Time to AS/ALE Fall tASL 30 ns Muxed Address Hold Time tAHL 10 ns Delay Time DS/E to AS/ALE Rise tASD 25 ns Pulse Width AS/ALE High PWASH 60 ns Delay Time, AS/alE to DS/E Rise tASED 40 ns Output Data Delay Time from DS/E or RD# tDDR 20 120 ns DataSetup Time tDSW 100 ns Reset Pulse Width tRWL 5 µs IRQ# Release from DS tIRDS 2 µs IRQ# Release from RESET# tIRR 2 µs Delay Time before Update Cycle tBUC 244 µs Periodic Interrupt Time Interval tPI See Table 1 Time of Update Cycle tUC 1708 µs NOTES 1. All voltages are referenced to ground. 2. All outputs are open. 3. Applies to the AD0-AD7 pins, the IRQ# pin and the SQW pin when each is in the high impedence state. 4. The IRQ# pin is open drain. 5. Measured with a load as shown in Figure 4. FIGURE 4: OUTPUT LOAD |
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