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CS5338-KS 数据表(PDF) 26 Page - Cirrus Logic

部件名 CS5338-KS
功能描述  16-Bit, Stereo A/D Converters for Digital Audio
PDF  34 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS5338-KS 数据表(HTML) 26 Page - Cirrus Logic

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puts are buffered, as shown in Figure 5, in order
to isolate the converter from the digital signal
processor. If slave mode is selected by pulling
SMODE low, then U9 (74HC243) will change to
the opposite direction, and act as an input buffer.
U9 is provided to protect against inadvertent ex-
ternal driving of SCLK, L/R and FSYNC while
in MASTER mode. U9 is not necessary in your
application circuit.
Jumper P4 allows the board to be configured for
either the CS5336/38, or the CS5339, which
have opposite polarities of SCLK.
Parallel Output Interface
Figure 6 depicts the parallel output interface on
the evaluation board. 16-bit words are assembled
from the serial data output of the converter. Each
bit of serial data is clocked out of the converter
VD+
MCK
SCK
PRO
FSYNC
SDATA
GND
V
C
U
M0
M1
M2
CS8402
U2
C7/C3
C1/FC0
C6/C2
C9/C15
EM1/C8
EM0/C9
CRE/FC1
RST
TXP
TXN
CBL
U8D
VD+
142 567 893
10 k
SIP
2
1
3
4
12
13
14
24
RST
___
20
17
R20
24
1
3
R19
110
OCLKD
P4
56
C24
0.1 uF
C34
1 uF
+
R18 20 k
R17
R16 20 k
20 k
Q2
Q2
RESET2
D2
CLK
SET2
13
9
12
11
10
8
+5 V
R11
47 k
__
L/R CS5336
FSYNC CS5336
7
74HC74
U12B
CS5336
FSYNC
SDATA
12
13
11
74HC08
21
22
23
9
10
11
15
18
19
8
____
__
__
__ ___
__ __
__
__ __
____
P3
CBL
V
C
U
16
3
2
4
5
6
8
7
1
14
15
13
12
11
9
10
16
_
DIPSW 8
SW 2
VD+
PULSE PE65612
SCHOTT 67125450
VD+
Figure 4. CS8402 Digital Audio Line Driver Connections
CDB5336,8,9
3-64
DS23DB5



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