LMT87LP datasheet(6/25 Pages) TI

6 / 25 page

LMT87, LMT87-Q1

SNIS170C – JAN 2014 – REVISED OCTOBER 2015

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7.5 Thermal Information

LMT87

LMT87-Q1

THERMAL METRIC(1)

UNIT

DCK

5 PINS

3 PINS

RθJA

Junction-to-ambient thermal resistance(2)(3)

275

167

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

°C/W

RθJB

Junction-to-board thermal resistance

146

°C/W

ψJT

Junction-to-top characterization parameter

1.2

°C/W

ψJB

Junction-to-board characterization parameter

146

°C/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report (SPRA953).

(2)

The junction-to-ambient thermal resistance (R θJA) under natural convection is obtained in a simulation on a JEDEC-standard, High K

board as specified in JESD51-7, in an environment described in JESD51-2.

(3)

Changes in output due to self heating can be computed by multiplying the internal dissipation by the thermal resistance.

7.6 Accuracy Characteristics

These limits do not include DC load regulation. These stated accuracy limits are with reference to the values in Table 1.

PARAMETER

CONDITIONS

MIN(1)

TYP

MAX(1)

UNIT

70°C to 150°C; VDD = 3.0 V to 5.5 V

-2.7

±0.4

2.7

°C

20°C to 40°C; VDD = 2.7 V to 5.5 V

±0.6

°C

20°C to 40°C; VDD = 3.4 V to 5.5 V

±0.3

°C

Temperature accuracy(2)

0°C; VDD = 3.0 V to 5.5 V

-2.7

±0.6

2.7

°C

0°C; VDD = 3.6 V to 5.5 V

±0.3

°C

–50°C; VDD = 3.6 V to 5.5 V

-2.7

±0.6

2.7

°C

–50°C; VDD = 4.2 V to 5.5 V

±0.3

°C

(1)

Limits are specific to TI's AOQL (Average Outgoing Quality Level).

(2)

Accuracy is defined as the error between the measured and reference output voltages, tabulated in the Transfer Table at the specified

conditions of supply gain setting, voltage, and temperature (expressed in °C). Accuracy limits include line regulation within the specified

conditions. Accuracy limits do not include load regulation; they assume no DC load.

7.7 Electrical Characteristics

Unless otherwise noted, these specifications apply for +VDD = 2.7 V to 5.5 V. MIN and MAX limits apply for TA = TJ = TMIN to

TMAX ; typical limits apply for TA = TJ = 25°C.

PARAMETER

CONDITIONS

MIN(1)

TYP (2)

MAX (1)

UNIT

Sensor gain (output transfer

–13.6

mV/°C

function slope)

Source

≤ 50 μA, (VDD – VOUT) ≥ 200 mV

–1

–0.22

Load regulation(3)

Sink

≤ 50 μA, VOUT ≥ 200 mV

0.26

Line regulation(4)

200

μV/V

TA = 30°C to 150°C, (VDD – VOUT) ≥ 100 mV

5.4

8.1

μA

Supply current

TA = –50°C to 150°C, (VDD – VOUT) ≥ 100 mV

5.4

μA

Output load capacitance

1100

Power-on time(5)

CL= 0 pF to 1100 pF

0.7

1.9

Output drive

TA = TJ = 25°C

–50

μA

(1)

Limits are specific to TI's AOQL (Average Outgoing Quality Level).

(2)

Typicals are at TJ = TA = 25°C and represent most likely parametric norm.

(3)

Source currents are flowing out of the LMT87 and LMT87-Q1. Sink currents are flowing into the LMT87 and LMT87-Q1.

(4)

Line regulation (DC) is calculated by subtracting the output voltage at the highest supply voltage from the output voltage at the lowest

supply voltage. The typical DC line regulation specification does not include the output voltage shift discussed in Output Voltage Shift.

(5)

Specified by design and characterization.

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