SPS-43-48H-CP-RDF

DS-5980 Rev 01 2013-08-23

Pin Definitions

Refer to Table for a description of the function of each I/O pin.

Table 8 - Module Pin Definitions

Pin Number

Label

Definition

1

Veet

Tx Ground

2

Tx_Fail

(Tx_Fault)

Tx Fail Alarm. LVTTL Output Active High

3

Tx_DIS

Tx Disable. LVTTL input. Laser output is disabled when this pin is asserted high or left

unconnected. Laser output is enabled when this pin is asserted low.

4

MOD_DEF (2)

2-Wire Serial Data I/O Pin.

5

MOD_DEF (1)

2-Wire Serial Clock Input.

6

MOD_DEF (0)

Internally Grounded

7

Reset

CMOS input. Assert “Reset” high at the end of previous burst, 2 bytes in duration

8

BRST_Det

LVTTL output. BRST_Det assert low when module receives “reset” signal, assert high

when incoming burst is present.

9

RSSI_ACQ

RSSI acquire/hold LVTTL Input. Digital RSSI output through I2C

10

Veer

Rx Ground

11

Veer

Rx Ground

12

RXD-

Negative Data Output, LVPECL; DC coupled

13

RXD+

Positive Data Output, LVPECL; DC coupled

14

Veer

Rx Ground

15

Vcc_Rx

Rx Vcc

16

Vcc_Tx

Tx Vcc

17

Veet

Tx Ground

18

TXD+

Positive Data Input, LVPECL or CML (AC coupled; internally 100 ohms differential

termination)

19

TXD-

Negative Data Input, LVPECLor CML (AC coupled; internally 100 ohms differential

termination)

20

Veet

Tx Ground