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TM16IO 数据表(PDF) 12 Page - Panasonic Semiconductor |
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TM16IO 数据表(HTML) 12 Page - Panasonic Semiconductor |
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12 / 25 page  MN103SFM9K 32-bit Single-chip Microcontroller Publication date: August 2014 12 PubNo. 232M9-010E P40 P41 P42 P43 P44 P45 P46 P47 70 71 72 73 74 75 76 77 I/O TM9AIO TM9BIO TM9AIO TM9BIO TM10AO TM10BO TM10AIO TM10BIO I/O port 4 8-bit CMOS I/O port. Each bit can be set individually as either an input or output by the P4DIR register. A pull-up resistor for each bit can be selected individually by the P4PLU register. At reset, the input mode (P40 to P47) is selected and pull-up resistor is disable. P50 P51 P52 P53 P54 P55 P56 P57 78 79 80 81 82 83 84 85 I/O TM6AO TM7BO PWM00 NPWM00 PWM01 NPWM01 PWM02 NPWM02 I/O port 5 8-bit CMOS I/O port. Each bit can be set individually as either an input or output by the P5DIR register. A pull-up resistor for each bit can be selected individually by the P5PLU register. At reset, the input mode (P50 to P57) is selected and pull-up resistor is disable. P60 P61 P62 P63 P64 P65 P66 P67 86 87 88 89 90 91 92 93 I/O PWM10 NPWM10 PWM11 NPWM11 PWM12 NPWM12 I/O port 6 8-bit CMOS I/O port. Each bit can be set individually as either an input or output by the P6DIR register. A pull-up resistor for each bit can be selected individually by the P6PLU register. At reset, the input mode (P60 to P67) is selected and pull-up resistor is disable. P72 P73 P74 P75 P76 P77 95 97 99 100 1 2 I/O TM11IO0 TM11IO1 TM11O2 TM11O3 TM11O4 TM11O5 I/O port 7 6-bit CMOS I/O port. Each bit can be set individually as either an input or output by the P7DIR register. A pull-up resistor for each bit can be selected individually by the P7PLU register. At reset, the input mode (P72 to P77) is selected and pull-up resistor is disable. P80 P81 P82 P83 P84 P86 P87 3 4 5 6 7 9 10 I/O IRQ00 IRQ01 IRQ02 IRQ03 TM14IO I/O port 8 7-bit CMOS input port. Each bit can be set individually as either an input or output by the P8PLU register. A pull-up resistor for each bit can be selected individually by the P8PLU register. At reset, the input mode (P80 to P87) is selected and pull-up resistor is disable. P90 P91 P92 P93 P94 P95 P96 P97 11 12 13 14 16 18 19 20 I/O ADIN00 ADIN01 ADIN02 ADIN03 ADIN04 ADIN05 ADIN06 ADIN07 I/O port 9 8-bit CMOS input port. Each bit can be set individually as either an input or output by the P9DIR register. A pull-up resistor for each bit can be selected individually by the P9PLU register. At reset, the input mode (P90 to P97) is selected and pull-down resistor is disable. PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 21 22 23 24 25 26 27 28 I/O ADIN08 ADIN09 ADIN10 ADIN11 ADIN12 ADIN13 ADIN14 ADIN15 I/O port A 8-bit CMOS input port. Each bit can be set individually as either an input or output by the PADIR register. A pull-up resistor for each bit can be selected individually by the PAPLU register. At reset, the input mode (PA0 to PA7) is selected and pull-down resistor is disable. PB0 PB1 PB2 PB3 29 30 34 35 I/O ADIN16 ADIN17 ADIN18 ADIN19 I/O port B 4-bit CMOS input port. Each bit can be set individually as either an input or output by the P8DIR register. A pull-up resistor for each bit can be selected individually by the P8PLU register. At reset, the input mode (P40 to P47) is selected and pull-down resistor is disable. Name TQFP 48 Pin No. I/O Other Function Function Description |
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