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ATMEGA16 数据表(PDF) 21 Page - ATMEL Corporation |
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ATMEGA16 数据表(HTML) 21 Page - ATMEL Corporation |
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21 / 315 page ![]() 21 ATmega16(L) 2466E–AVR–10/02 I/O Memory The I/O space definition of the ATmega16 is shown in “Register Summary” on page 298. All ATmega16 I/Os and peripherals are placed in the I/O space. The I/O locations are accessed by the IN and OUT instructions, transferring data between the 32 general pur- pose working registers and the I/O space. I/O Registers within the address range $00 - $1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the value of single bits can be checked by using the SBIS and SBIC instructions. Refer to the Instruction Set section for more details. When using the I/O specific commands IN and OUT, the I/O addresses $00 - $3F must be used. When addressing I/O Registers as data space using LD and ST instructions, $20 must be added to these addresses. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses should never be written. Some of the status flags are cleared by writing a logical one to them. Note that the CBI and SBI instructions will operate on all bits in the I/O Register, writing a one back into any flag read as set, thus clearing the flag. The CBI and SBI instructions work with reg- isters $00 to $1F only. The I/O and peripherals control registers are explained in later sections. |
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