FXLS8471Q datasheet(21/75 Pages) FREESCALE

21 / 75 page

FXLS8471Q

Sensors

Freescale Semiconductor, Inc.

Modes of Operation

Figure 9. FXLS8471Q power mode transition diagram

All register contents are preserved when transitioning from Active to Standby mode, but some registers are reset when

transitioning from Standby to Active. These registers are noted in Table 13, “Register Address Map,” on page 25. The Sleep and

Wake modes are active modes. For more information on how to use the Sleep and Wake modes and configuring the device to

transition between them, please refer to Section 8, “Embedded Functionality” or Freescale application note AN4074.

Table 12. Mode of operation description

Mode

I2C/SPI Bus state

VDD

VDDIO

Function description

OFF

Powered down

<1.8 V VDDIO can be > VDD

The device is powered off. All analog and digital blocks

are shutdown. I2C bus inhibited.

Standby

I2C/SPI communication with

FXLS8471Q is possible

VDDIO = High

VDD = High

Active bit is cleared

Only digital blocks are enabled.

Analog subsystem is disabled. Internal clocks disabled.

Active

(Wake/Sleep)

I2C/SPI communication with

FXLS8471Q is possible

VDDIO = High

VDD = High

Active bit is set

All blocks are enabled (digital and analog).

Sleep

Wake

Standby

OFF

Active

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