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REF5040MDREP 数据表(PDF) 20 Page - Texas Instruments |
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REF5040MDREP 数据表(HTML) 20 Page - Texas Instruments |
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20 / 29 page ![]() Low ESR Capacitor ESR V IH TMP GND V OUT Trim/NR Bypass Capacitor Noise Reduction Capacitor Low ESR Capacitor V OUT GND REF5020-EP, REF5025-EP, REF5040-EP, REF5050-EP SBOS471B – APRIL 2010 – REVISED JUNE 2015 www.ti.com 10.2 Layout Example Figure 35. Recommended Layout for REF50xx 10.3 Power Dissipation The REF50xx family is specified to deliver current loads of ±10 mA over the specified input voltage range. The temperature of the device increases according to the equation: TJ = TA + PD × RθJA where • TJ = Junction temperature (°C) • TA = Ambient temperature (°C) • PD = Power dissipated (W) • RθJA = Junction-to-ambient thermal resistance (°C/W) (3) The REF50xx junction temperature must not exceed the absolute maximum rating of 150°C. 20 Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: REF5020-EP REF5025-EP REF5040-EP REF5050-EP |
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