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AS8202B 数据表(PDF) 4 Page - ams AG |
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AS8202B 数据表(HTML) 4 Page - ams AG |
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4 / 20 page  www.ams.com Revision 1.0 4 - 20 AS8202B Datasheet - Pin Assignm ents RAM_CLK_TESTSE 21 TTL Input with internal weak pull-down RAM_CLK when STEST=0 and USE_RAM_CLK=1, else Test Input, connect to VSS if not used STEST 22 Test Input, connect to VSS FTEST 24 Test Input, connect to VSS FIDIS 25 Test Input, connect to VSS TTEST 61 TTL Input with internal weak pull-up Test Input, connect to VDD USE_RAM_CLK 34 TTL Input with internal weak pull-down RAM_CLK Pin Enable, connect to VSS if not used XIN0 2 Analog CMOS pin Main Clock: 40MHz external clock input CTEST 3 Test input, to be unconnected OSCMODE 23 TTL Input with internal weak pull-down Connect to VDD 1 XIN1 72 Analog CMOS pin Bus Guardian Clock: Analog CMOS Oscillator Input, use as input when providing external clock XOUT1 71 Bus Guardian Clock: Analog CMOS Oscillator Output, leave open when providing external clock RESETB 26 TTL Input with internal weak pull-up Main Reset Input, active low TxD0 5 TTL output with internal weak pull-up at tristate TTP Bus Channel 0: Transmit Data CTS0 6 TTL output with internal weak pull-down at tristate TTP Bus Channel 0: Transmit Enable RxD0 11 TTL Input with internal weak pull-up TTP Bus Channel 0: Receive Data TxCLK0 7 TTL Input with internal weak pull-down TTP Bus Channel 0: Transmit Clock (MII mode) RxER0 8 TTL Input with internal weak pull-up TTP Bus Channel 0: Receive Error (MII mode) RxCLK0 9 TTL Input with internal weak pull-down TTP Bus Channel 0: Receive Clock (MII mode) RxDV0 10 TTL Input with internal weak pull-up TTP Bus Channel 0: Receive Data Valid (MII mode) TxD1 14 TTL output with internal weak pull-up at tristate TTP Bus Channel 1: Transmit Data CTS1 15 TTL output with internal weak pull-down at tristate TTP Bus Channel 1: Transmit Enable RxD1 20 TTL Input with internal weak pull-up TTP Bus Channel 1: Receive Data TxCLK1 16 TTL Input with internal weak pull-down TTP Bus Channel 1: Transmit Clock (MII mode) RXER1 17 TTL Input with internal weak pull-up TTP Bus Channel 1: Receive Error (MII mode) RXCLK1 18 TTL Input with internal weak pull-down TTP Bus Channel 1: Receive Clock (MII mode) RxDV1 19 TTL Input with internal weak pull-up TTP Bus Channel 1: Receive Data Valid (MII mode) Table 1. Pin Descriptions Pin Name Pin Number Dir Description |
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