AP3598A datasheet(21/28 Pages) DIODES

21 / 28 page

AP3598A

Document number: DS37261 Rev. 2 - 2

21 of 28

www.diodes.com

November 2014

AP3598A

A Product Line of

Diodes Incorporated

Application Information (Cont.)

3. Place the first zero fZ1 before the output LC filter double pole frequency fLC.



 75

Calculate the C2 by the equation:







4. Set the pole at the ESR zero frequency fESR:

ESR



Calculate the C1 by the following equation:







ESR



5. Set the second pole fP2 at the half of the switching frequency and also set the second zero fZ2 at the output LC filter double pole fLC. The

compensation gain should not exceed the error amplifier open loop gain. Check the compensation gain at fP2 with the capabilities of the error

amplifier.







Combine the two equations will get the following component calculations:













Figure 15. Converter Gain and Frequency

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