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EM3581-RTR 数据表(PDF) 52 Page - Silicon Laboratories

部件名 EM3581-RTR
功能描述  High-Performance, Integrated ZigBee/802.15.4 System-on-Chip Family
PDF  59 Pages
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制造商  SILABS [Silicon Laboratories]
网页  http://www.silabs.com
标志 SILABS - Silicon Laboratories

EM3581-RTR 数据表(HTML) 52 Page - Silicon Laboratories

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EM358x
52
Rev 1.0
6.1.1. QFN48 Footprint Recommendations
Figure 6.3 demonstrates the IPC-7351 recommended PCB Footprint for the EM358x (QFN50P700X700X90-49N).
A ground pad in the bottom center of the package forms a 49th pin.
A 3 x 3 array of non-thermal vias should connect the EM358x decal center shown in Figure 6.3 to the PCB ground
plane through the ground pad. In order to properly solder the EM358x to the footprint, the Paste Mask layer should
have a 3 x 3 array of circular openings at 1.015 mm diameter spaced approximately 1.625 mm (center to center)
apart, as shown in Figure 6.4. This will cause an evenly distributed solder flow and coplanar attachment to the
PCB. The solder mask layer (illustrated in Figure 6.5) should be the same as the copper layer for the EM358x
footprint.
For more information on the package footprint, please refer to the appropriate
EM358x Reference Design.
Figure 6.3. PCB Footprint for the EM358x
Figure 6.4. Paste Mask
X2
Y2
C1
E
X1
Y1
C2
MIN
MAX
TYP
X1
X2
Y1
Y2
C1
C2
E
6.85
6.85
0.30
5.35
0.90
5.35
0.50
* Dimensions in mm
* Dimensions are for
Figures 19-2, 19-3
and 19-4
a1
b1
Via Drill DIA = 0.254mm
a0
b0
b0
b1
a0
a1
1.80
1.625
1.80
1.625
a2
a2
0.75
b2
0.75
b2
a1
C1
E
X1
Y1
C2
b1
b0
a0
DIA = 1.01mm



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