AD9154-EBZ datasheet(19/124 Pages) AD

19 / 124 page

Data Sheet

AD9154

Rev. B | Page 19 of 124

Figure 32. Total SERDES Supply Current (SVDD12) vs. Lane Rate:

2, 4, and 8 Lanes

Figure 33. Single Tone Phase Noise vs. Offset Frequency at Four Different fOUT

Rates, fDAC = 2.0 GHz, PLL Off

Figure 34. Single Tone Phase Noise vs. Offset Frequency at Four Different fOUT

Rates, fDAC = 2.0 GHz, PLL On

Figure 35. 1C 256 Point Quadrature Amplitude Modulation (QAM) Signal

ACLR Performance, IF = 180 MHz, fDAC = 1966.08 MHz

100

200

300

400

500

600

700

800

LANE RATE (Gbps)

1.2V, 8 LANES

1.2V, 4 LANES

1.2V, 2 LANES

1.3V, 8 LANES

1.3V, 4 LANES

1.3V, 2 LANES

180

160

140

120

100

10k

100k

10M

OFFSET FREQUENCY (Hz)

51MHz FALSE

101MHz FALSE

201MHz FALSE

401MHz FALSE

51MHz SMA100A

180

160

140

120

100

10k

100k

10M

OFFSET FREQUENCY (Hz)

51MHz TRUE

101MHz TRUE

201MHz TRUE

401MHz TRUE

51MHz SMA100A

–30

–130

–120

–110

–100

–90

–80

–70

–60

–50

–40

CENTER 180MHz

#RES BW 30kHz

SPAN 65.4MHz

SWEEP 212.1ms

#VBW 300kHz

AD9154-EBZ 数据表(PDF) 19 Page - Analog Devices

AD9154-EBZ 数据表(HTML) 19 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载