CAP1298 datasheet(7/68 Pages) MICROCHIP

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DS00001571B-page 7

CAP1298

2.0

ELECTRICAL SPECIFICATIONS

Note 2-1

Stresses above those listed could cause permanent damage to the device. This is a stress rating

only and functional operation of the device at any other condition above those indicated in the

operation sections of this specification is not implied.

Note 2-2

For the 5V tolerant pins that have a pull-up resistor, the voltage difference between V5VT_PIN and VDD

must never exceed 3.6V.

Note 2-3

The Package Power Dissipation specification assumes a recommended thermal via design consisting

of a 2x2 matrix of 0.3mm (12mil) vias at 1.0mm pitch connected to the ground plane with a 1.6 x

1.6mm thermal landing.

Note 2-4

Junction to Ambient (



JA) is dependent on the design of the thermal vias. Without thermal vias and

a thermal landing, the



JA will be higher.

TABLE 2-1:

ABSOLUTE MAXIMUM RATINGS

Voltage on VDD pin

-0.3 to 6.5

Voltage on CS pins to GND

-0.3 to 4.0

Voltage on 5V tolerant pins (V5VT_PIN)

-0.3 to 5.5

Voltage on 5V tolerant pins (|V5VT_PIN - VDD|) (see Note 2-2)0 to 3.6

Input current to any pin except VDD

+10

Output short circuit current

Continuous

N/A

Package Power Dissipation up to TA = 85°C for 16-pin QFN

(see Note 2-3)

0.5

Junction to Ambient (



JA) (see Note 2-4)70

°C/W

Operating Ambient Temperature Range

-40 to 125

°C

Storage Temperature Range

-55 to 150

°C

ESD Rating, All Pins, HBM

8000

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