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LNBH25S 数据表(PDF) 21 Page - STMicroelectronics

部件名 LNBH25S
功能描述  LNB supply and control IC with step-up and IC interface
PDF  37 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

LNBH25S 数据表(HTML) 21 Page - STMicroelectronics

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LNBH25S
I²C interface protocol
DocID026736 Rev 2
21/37
7
I²C interface protocol
7.1
Write mode transmission
The LNBH25S interface protocol is made up of:
A start condition (S)
A chip address byte with the LSB bit R/W = 0
A register address (internal address of the first register to be accessed)
A sequence of data (byte to write to the addressed internal register + acknowledge)
The following bytes, if any, to be written to successive internal registers
A stop condition (P). The transfer lasts until a stop bit is encountered
The LNBH25S, as slave, acknowledges every byte transfer
Figure 11: Example of writing procedure starting with first data address 0X2
ACK = acknowledge
S = start
P = stop
R/W = 1/0, read/write bit
X = 0/1, set the values to select the chip address, see Table 16: "Address pin
characteristics" for pin selection and to select the register address, see Table 7: "Data 1
(read/write register. Register address = 0X2)".
The writing procedure can start from any register address by simply setting X
values in the register address byte (after the chip address). It can be also stopped
by the master by sending a stop condition after any acknowledge bit.
S
X
X
0
0
X
0
0
0
X
0
0
1
0
0
0
S
X
X
0
0
X
0
0
0
X
0
1
0
0
0
MSB
LSB
CHIP AD DRE SS
MSB
LSB
REGISTER AD DRESS
MSB
LSB
CHIP AD DRE SS
MSB
LSB
REGISTER AD DRESS
P
P
MSB
LSB
MSB
LSB
MSB
LSB
MSB
LSB
DATA 1
Add=0x2
DATA 2
Add=0x3
DATA 3
Add=0x4
DATA 4
Add=0x5
MSB
LSB
MSB
LSB
MSB
LSB
MSB
LSB
DATA 1
Add=0x2
DATA 2
Add=0x3
DATA 3
Add=0x4
DATA 4
Add=0x5
GIPG1007141414LM



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