M95040-DRMN3TP datasheet(6/41 Pages) STMICROELECTRONICS

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Description

M95040-A125 M95040-A145

6/41

DocID024225 Rev 6

Description

The M95040-A125 and M95040-A145 are 4-Kbit serial EEPROM Automotive grade devices

operating up to 145°C. They are compliant with the very high level of reliability defined by

the Automotive standard AEC-Q100 grade 0.

The devices are accessed by a simple serial SPI compatible interface running up to

20 MHz.

The memory array is based on advanced true EEPROM technology (Electrically Erasable

PROgrammable Memory). The M95040-A125 and M95040-A145 are byte-alterable

memories (512 × 8 bits) organized as 32 pages of 16 byte in which the data integrity is

significantly improved with an embedded Error Correction Code logic.

The M95040-A125 and M95040-A145 offer an additional Identification Page (16 byte) in

which the ST device identification can be read. This page can also be used to store

sensitive application parameters which can be later permanently locked in read-only mode.

Figure 1. Logic diagram

M95040-DRMN3TP 数据表(PDF) 6 Page - STMicroelectronics