ST25TA02K datasheet(17/50 Pages) STMICROELECTRONICS

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ST25TA02K

ST25TA02K memory management

3.5

Read/Write counter

A 20 bits counter can track the read or write events on the NDEF file.

It benefits from an anti-tearing mechanism, that ensures the consistency of the counter,

even if there has been an electrical problem during its increment.

The value of the Read/Write counter can be checked by any application, by reading suitable

bytes in System file (see Section 3.1.4).

If enabled, the Read/Write counter will be incremented on first event (exclusively Read or

Write) which is performed on the NDEF File, inside an RF session (an RF session is entered

when ST25TA02K receives a valid "Select Application" command).

The counter is reset when it is disabled.

Apart from these procedures, there is no way to act on the value of this counter.

The Read/Write counter can be configured through a specific byte in System file (see

Section 3.1.4).

This configuration byte allows to:

•

Enable or disable this counter

•

Define if the counter must be incremented on a read or write sequence

•

Definitively lock this configuration byte

Warning:

Once this configuration byte is locked, it cannot be changed

anymore: the counter will behave accordingly.

If enabled, the Read/Write counter will have an impact on the execution time of the event

which is countered: the counter increment needs some write cycles of specific EEPROM

cells automatically managed by ST25TA02K, which increase the total time before the

response is sent to the reader.

As a consequence, an S(WTX) request can be issued on the command that will increment

the counter (see Section 5.4: S-Block format).

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