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STAP16DPPS05 数据表(PDF) 8 Page - STMicroelectronics |
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STAP16DPPS05 数据表(HTML) 8 Page - STMicroelectronics |
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8 / 33 page ![]() Electrical ratings STAP16DPPS05 8/33 DocID024306 Rev 6 2.3 Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter Test conditions Min. Typ. Max. Unit VDD Supply voltage 3.0 - 5.5 V VO Output voltage - 20 V IO Output current OUTn 3 - 40 mA IOH Output current SeriaL-OUT - +1 mA IOL Output current Serial-OUT - -1 mA VIH Input voltage 0.7 VDD -VDD V VIL Input voltage -0.3 - 0.3 VDD V twLAT LE/DM1 pulse width VDD = 3.0 V to 5.0 V 20 - ns twCLK CLK pulse width 10 - ns twEN OE/DM2 pulse width 100 - ns tSETUP(D) Setup time for DATA 8 - ns tHOLD(D) Hold time for DATA 5 - ns tSETUP(L) Setup time for LATCH 8 - ns fCLK Clock frequency Cascade operation (1) 1. If the device is connected in cascade, it may not be possible to achieve the maximum data transfer. Please consider the timings carefully. -30 MHz |
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