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C868 数据表(PDF) 21 Page - Infineon Technologies AG

部件名 C868
功能描述  8-Bit Single-Chip Microcontroller
PDF  82 Pages
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制造商  INFINEON [Infineon Technologies AG]
网页  http://www.infineon.com
标志 INFINEON - Infineon Technologies AG

C868 数据表(HTML) 21 Page - Infineon Technologies AG

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C868
Data Sheet
21
V 1.0, 2003-05
Clock system
The C868 clock system consist of the on-chip oscillator, PLL and multiplexer stage. The
programmable Slow Down Divider (SDD) divides the PLL output clock frequency by a
factor of 1...32 which is specified via CMCON.REL. The system clock is switched from
the PLL output to the output from the SDD when slowdown mode is selected.
Figure 11
Block Diagram of the Clock Generation
On-Chip
Osc
clkin
clkout
f
OSC
XTAL1
XTAL2
PLL
SDD
MUX
system
clock (
fSYS)
f
PLL



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