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STL8DN10LF3 数据表(PDF) 4 Page - STMicroelectronics |
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STL8DN10LF3 数据表(HTML) 4 Page - STMicroelectronics |
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4 / 15 page ![]() Electrical characteristics STL8DN10LF3 4/15 DocID023009 Rev 6 2 Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 4. On/off states Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)DSS Drain-source breakdown voltage (VGS= 0) ID = 250 µA 100 V IDSS Zero gate voltage drain current (VGS = 0) VDS = 100 V 1 µA IGSS Gate body leakage current (VDS = 0) VGS = ±20 V ± 100 nA VGS(th) Gate threshold voltage VDS= VGS, ID = 250 µA 1 2.5 V RDS(on) Static drain-source on- resistance VGS= 10 V, ID= 4 A 25 35 m Ω VGS= 5 V, ID= 4 A 40 50 m Ω Table 5. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Ciss Input capacitance VDS =25 V, f=1 MHz, VGS=0 -970 - pF Coss Output capacitance - 115 - pF Crss Reverse transfer capacitance - 11.5 - pF Qg Total gate charge VDD=50 V, ID = 7.8 A VGS =10 V Figure 13 - 20.5 - nC Qgs Gate-source charge - 4 - nC Qgd Gate-drain charge - 5 - nC RG Intrinsic gate resistance f=1 MHz open drain - 3.65 - Ω Table 6. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time VDD=50 V, ID= 7.8 A, RG=4.7 Ω, VGS=10 V Figure 14 -8.7 - ns tr Rise time - 9.6 - ns td(off) Turn-off delay time - 50.6 - ns tf Fall time - 5.2 - ns |
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