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74F157ASC 数据表(PDF) 2 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 74F157ASC
功能描述  Quad 2-Input Multiplexer
PDF  8 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

74F157ASC 数据表(HTML) 2 Page - National Semiconductor (TI)

  74F157ASC Datasheet HTML 1Page - National Semiconductor (TI) 74F157ASC Datasheet HTML 2Page - National Semiconductor (TI) 74F157ASC Datasheet HTML 3Page - National Semiconductor (TI) 74F157ASC Datasheet HTML 4Page - National Semiconductor (TI) 74F157ASC Datasheet HTML 5Page - National Semiconductor (TI) 74F157ASC Datasheet HTML 6Page - National Semiconductor (TI) 74F157ASC Datasheet HTML 7Page - National Semiconductor (TI) 74F157ASC Datasheet HTML 8Page - National Semiconductor (TI)  
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Unit LoadingFan Out
54F74F
Pin Names
Description
UL
Input IIH IIL
HIGHLOW
Output IOH IOL
I0a–I0d
Source 0 Data Inputs
1010
20 mA b06 mA
I1a–I1d
Source 1 Data Inputs
1010
20 mA b06 mA
E
Enable Input (Active LOW)
1010
20 mA b06 mA
S
Select Input
1010
20 mA b06 mA
Za–Zd
Outputs
50333
b
1 mA20 mA
Functional Description
The ’F157A is a quad 2-input multiplexer It selects four bits
of data from two sources under the control of a common
Select input (S) The Enable input (E) is active LOW When
E is HIGH all of the outputs (Z) are forced LOW regardless
of all other inputs The ’F157A is the logic implementation of
a 4-pole 2-position switch where the position of the switch
is determined by the logic levels supplied to the Select in-
put The logic equations for the outputs are shown below
Zn e E  (I1n S a I0n S)
A common use of the ’F157A is the moving of data from two
groups of registers to four common output busses The par-
ticular register from which the data comes is determined by
the state of the Select input A less obvious use is as a
function generator The ’F157A can generate any four of the
16 different functions of two variables with one variable
common This is useful for implementing highly irregular
logic
Truth Table
Inputs
Output
E
SI0
I1
Z
HX
X
X
L
LH
X
L
L
LH
X
H
H
LL
L
X
L
LL
H
X
H
H e HIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
Logic Diagram
TLF9483 – 4
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays
2



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