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ISO7220CD 数据表(PDF) 21 Page - Texas Instruments

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部件名 ISO7220CD
功能描述  Dual Channel Digital Isolators
PDF  35 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

ISO7220CD 数据表(HTML) 21 Page - Texas Instruments

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ISO7220A, ISO7220B, ISO7220C, ISO7220M
ISO7221A, ISO7221B, ISO7221C, ISO7221M
www.ti.com
SLLS755N – JULY 2006 – REVISED SEPTEMBER 2015
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
UNIT
Tracking resistance (Comparative
CTI
DIN EN 60112 (VDE 0303-11); IEC 60112
400
V
Tracking Index)
DTI
Distance through the insulation
Minimum Internal Gap (Internal Clearance)
0.008
mm
Input to output, VIO = 500 V, all pins on each side of
the barrier tied together creating a two-pin device,
1012
Ω
RIO
Isolation resistance
TA = 25°C
Input to output, VIO = 500 V, 100°C ≤ TA ≤ max
1011
Ω
CIO
Barrier capacitance Input to output
VI = 0.4 sin (4E6πt)
1
pF
CI
Input capacitance to ground
VI = 0.4 sin (4E6πt)
1
pF
Table 1. IEC 60664-1 Ratings Table
PARAMETER
TEST CONDITIONS
SPECIFICATION
Basic isolation group
Material group
II
Rated mains voltage
≤150 VRMS
I-IV
Installation classification
Rated mains voltage
≤300 VRMS
I-III
Rated mains voltage
≤400 VRMS
I-II
8.3.3 Regulatory Information
VDE
CSA
UL
Certified according to DIN V VDE V 0884-10 (VDE V
Approved according to CSA Component Acceptance
Recognized under UL 1577 Component
0884-10):2006-12 and DIN EN 61010-1 (VDE 0411-
Notice 5A and IEC 60950-1
Recognition Program
1)
Basic Insulation
Evaluated to CSA 60950-1-07 and IEC 60950-1 (2nd
Maximum Transient Overvoltage, 4000 VPK
Ed.) with 2000 VRMS Isolation rating for products with
Single Protection, 2500 VRMS
(1)
Maximum Surge Voltage, 4000 VPK
working voltages
≤ 125 VRMS for reinforced insulation
Maximum Working Voltage, 560 VPK
and
≤ 390 VRMS for basic insulation
Certificate Number: 40016131
Master Contract Number: 220991
File Number: E181974
(1)
Production tested
≥3000 VRMS for 1 second in accordance with UL 1577.
8.3.4 Safety Limiting Values
Safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output circuitry.
A failure of the IO can allow low resistance to ground or the supply and, without current limiting, dissipate
sufficient power to overheat the die and damage the isolation barrier potentially leading to secondary system
failures.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
θJA = 212°C/W, VI = 5.5 V, TJ = 170°C, TA = 25°C
124
Safety input, output, or
IS
SOIC-8
mA
supply current
θJA = 212°C/W, VI = 3.6 V, TJ = 170°C, TA = 25°C
190
TS
Maximum case temperature
SOIC-8
150
°C
The safety-limiting constraint is the absolute maximum junction temperature specified in Absolute Maximum
Ratings. The power dissipation and junction-to-air thermal impedance of the ISO7220x and ISO7221x devices
installed in the application hardware determines the junction temperature. The assumed junction-to-air thermal
resistance in Thermal Information is that of a device installed in the JESD51-3, Low Effective Thermal
Conductivity Test Board for Leaded Surface Mount Packages and is conservative. The power is the
recommended maximum input voltage times the current. The junction temperature is then the ambient
temperature plus the power times the junction-to-air thermal resistance.
Copyright © 2006–2015, Texas Instruments Incorporated
Submit Documentation Feedback
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Product Folder Links: ISO7220A ISO7220B ISO7220C ISO7220M ISO7221A ISO7221B ISO7221C ISO7221M



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