DocID024305 Rev 6

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STAP08DP05

Detection mode functionality

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10

Detection mode functionality

10.1

Phase one: “entering error detection mode“

From the “normal mode” condition the device can switch to “error detection mode” by a logic

sequence on the OE/DM2 and LE/DM1 pins as shown in the following table and diagram.

rising edge of CLK, the SDI data are ready for sampling.

Table 12. Entering error detection mode truth table

CLK

1°2°3°4°5°

OE/DM2

H

L

HHH

LE/DM1

LLL

H

L

Figure 17. Entering error detection mode timing diagram