ACT2813 datasheet(15/23 Pages) ACTIVE-SEMI

15 / 23 page

Rev 2, 19-May-15

Innovative PowerTM

- 15 -

www.active-semi.com

ACT2813/ACT2813C

When laying out the printed circuit board, the

following checklist should be used to ensure proper

operation of the IC.

1. Arrange the power components to reduce the

AC loop size, VIN pin, Vout pin, SW pin and the

schottky diode.

2. Place input decoupling ceramic capacitor C1

and R9 as close to VIN pin as possible.

Resistor R9 is added in series with capacitor

C1 to damp the potential LC resonance .

3. Use copper plane for power GND for best heat

dissipation and noise immunity.

4. Place CSP and CSN capacitor C7 (10nF) close

to CSP and CSN pin as possible, use Kevin

Sense from sense resistor R1 and R2 to CSP

and CSN pins. 22uF decoupling capacitor is

added close to VBAT pin.

5. Place the ceramic capacitor C2 and D1 as

close to VOUT and PGND as possible, SW

goes under the C2 (recommend C2 to use 1206

size). SW pad is a noisy node switching. It

should be isolated away from the rest of circuit

for good EMI and low noise operation.

6. RC snubber is recommended to add across SW

to PGND to reduce EMI noise.

A demo board PCB layout example is shown in the

figure 16.

Top Layer

Figure 16.

PCB Layout

Bottom Layer

PC Board Layout Guidance

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