ACT4533C

Rev 1, 14-Nov-14

Innovative Power

TM

- 2 -

www.active-semi.com

Copyright © 2014 Active-Semi, Inc.

ORDERING INFORMATION

PART NUMBER

OPERATION AMBIENT

TEMPERATURE RANGE

OVP/EN

PIN

PACKAGE

PINS

PACKING

ACT4533CYH-T

-40°C to 85°C

OVP

SOP-8EP

8

TAPE & REEL

PIN CONFIGURATION

PIN DESCRIPTIONS

PIN

NAME

DESCRIPTION

1

HSB

High Side Bias Pin. This provides power to the internal high-side MOSFET gate driver.

Connect a 22nF capacitor from HSB pin to SW pin.

2

IN

Power Supply Input. Bypass this pin with a 10µF ceramic capacitor to GND, placed as

close to the IC as possible.

3

SW

Power Switching Output to External Inductor.

4

GND

Ground. Connect this pin to a large PCB copper area for best heat dissipation. Return

FB, COMP, and ISET to this GND, and connect this GND to power GND at a single

point for best noise immunity.

5

FB

Feedback Input. The voltage at this pin is regulated to 0.808V. Connect to the resistor

divider between output and GND to set the output voltage.

6

COMP

Error Amplifier Output. This pin is used to compensate the converter.

7

OVP

OVP input. If the voltage at this pin exceeds 0.8V, the IC shuts down high-side switch.

8

ISET

Output Current Setting Pin. Connect a resistor from ISET to GND to program the

output current.

Exposed Pad

Heat Dissipation Pad. Connect this exposed pad to large ground copper area with

copper and vias.