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STW72N60DM2AG 数据表(PDF) 4 Page - STMicroelectronics |
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STW72N60DM2AG 数据表(HTML) 4 Page - STMicroelectronics |
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4 / 12 page ![]() Electrical characteristics STW72N60DM2AG 4/12 DocID027314 Rev 4 2 Electrical characteristics (Tcase = 25 °C unless otherwise specified) Table 5: Static Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)DSS Drain-source breakdown voltage VGS = 0 V, ID = 1 mA 600 V IDSS Zero gate voltage drain current VGS = 0 V, VDS = 600 V 10 µA VGS = 0 V, VDS = 600 V, Tcase = 125 °C 100 IGSS Gate-body leakage current VDS = 0 V, VGS = ±25 V ±5 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 3 4 5 V RDS(on) Static drain-source on- resistance VGS = 10 V, ID = 33 A 0.037 0.042 Ω Table 6: Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Ciss Input capacitance VDS = 100 V, f = 1 MHz, VGS = 0 V - 5508 - pF Coss Output capacitance - 241 - Crss Reverse transfer capacitance - 2.8 - Coss eq.(1) Equivalent output capacitance VDS = 0 to 480 V, VGS = 0 V - 1010 - pF RG Intrinsic gate resistance f = 1 MHz open drain - 2 - Ω Qg Total gate charge VDD = 480 V, ID = 66 A, VGS = 10 V (see Figure 15: "Test circuit for gate charge behavior") - 121 - nC Qgs Gate-source charge - 26 - Qgd Gate-drain charge - 60 - Notes: (1) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. Table 7: Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time VDD = 300 V, ID = 33 A RG = 4.7 Ω, VGS = 10 V (see Figure 14: "Test circuit for resistive load switching times" and Figure 19: "Switching time waveform") - 32 - ns tr Rise time - 67 - td(off) Turn-off delay time - 112 - tf Fall time - 10.4 - |
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