VD5377CBGP datasheet(71/88 Pages) STMICROELECTRONICS

71 / 88 page

Doc ID 022952 Rev 2

71/88

VD5377

I2C register map

GPIO_BACKLED1

gpio_backled1_en

PRW

BACKLED1 output enable

(active low)

0 = PAD configured as OUTPUT

1 = PAD configured as INPUT

gpio_backled1_a

PRW

BACKLED1 data output (when

_en = 0)

gpio_backled1_zi

BACKLED1 IO value

gpio_backled1_tm

PRW

Reserved. Do not modify this

bit.

gpio_backled1_a_ctrl

PRW

BACKLED1 data output origin

0 = Output value from HW

1 = Output value from PWM 1

gpio_backled1_

opendrain

7PRW

BACKLED1 pad open drain

control

0 = BACKLED1 pad normal

config

1 = BACKLED1 pad in open

drain (A=EN)

GPIO_BACKLED2

gpio_backled2_en

PRW

BACKLED2 output enable

(active low)

0 = PAD configured as OUTPUT

1 = PAD configured as INPUT

gpio_backled2_a

PRW

BACKLED2 data output (when

_en = 0)

gpio_backled2_zi

BACKLED2 IO value

gpio_backled2_tm

PRW

Reserved. Do not modify this

bit.

gpio_backled2_a_ctrl

PRW

BACKLED2 data output origin

0 = Output value from HW

1 = Output value from PWM 2

gpio_backled2_

opendrain

7PRW

BACKLED2 pad open drain

control

0 = BACKLED2 pad normal

config

1 = BACKLED2 pad in open

drain (A=EN)

Table 38. I2C register map (continued)

Addr

(Hex)

SIgnal name

Bit

Type

Default

(Hex)

Comment

VD5377CBGP 数据表(PDF) 71 Page - STMicroelectronics

VD5377CBGP 数据表(HTML) 71 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88

数据表下载