ACE4101

Max. 1.6A Li-ion Switching Charger IC

VER 1.4

7

When the battery voltage approaches the programmed float voltage, the charge current will start to

decrease. It terminates the charge cycle when the charge current falls to 10% of the full‐scale value after

the final float voltage is reached. When the ISET pin voltage falls below 100mV for longer than tTERM

(typically 1ms), charging is terminated. The charge current is latched off and the ACE4101 enters standby

mode,

where the input supply current drops to 200μA. (Note: C/10 termination is disabled in trickle

charging and thermal limiting modes).

Manual Shutdown

Floating the ISET pin by removing the resistor from ISET pin to ground can put the device in shutdown

mode. The battery drain current is thus reduced to

less than 5μA and the supply current to less than 50μA.

Reconnecting the resistor back will restart a new charge cycle.

Once manually shutdown, the CHRG pin is in a weak pull‐down state if VIN is above UVLO voltage. The

CHRG pin is in a high impedance state if the ACE4101 is in under voltage lockout mode.

Automatic Recharge

After the termination of the charge cycle, the ACE4101 constantly monitors the BAT pin voltage and

starts a new charge cycle when the battery voltage falls below 4.05V, keeping the battery at fully charged

condition. CHRG output enters a strong pull‐down state during recharge cycles.

Inductor Selection

The peak‐to‐peak ripple is limited to 30% of the maximum output current. This places the peak current

far enough from the minimum over current trip level to ensure reliable operation while providing enough

current ripples for the current mode converter to operate stably. In this case, for 1.6A maximum output

current, the maximum inductor ripple current is 667 mA. The inductor size is estimated as following

equation:

Layout Considerations

CCHRIN as close to Pins CHRIN and GND. The PCB copper area associated with SW pin must be

minimized to avoid the potential noise problem. FB Resistors and the traces connecting to the FB pin

must not adjacent to the SW net on the PCB layout to avoid the noise problem. ISET resistor must be as

far away with the SW net as possible. The thermal pad under the IC must be tied to the ground area on

the top layer, and use via to connect this ground area to any internal ground planes.