 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
SAF-C504 数据表(PDF) 21 Page - Infineon Technologies AG |
|
|
|||||||||||||||||||||||||||||
SAF-C504 数据表(HTML) 21 Page - Infineon Technologies AG |
|
|
21 / 71 page  C504 Data Sheet 17 2000-05 Table 2 Special Function Registers - Functional Blocks Block Symbol Name Addr. Contents after Reset CPU ACC B DPH DPL PSW SP SYSCON Accumulator B-Register Data Pointer, High Byte Data Pointer, Low Byte Program Status Word Register Stack Pointer System Control Register E0 H 1) F0 H 1) 83 H 82 H D0 H 1) 81 H B1 H 00 H 00 H 00 H 00 H 00 H 07 H XX10XXX0 B 3) Interrupt System IEN0 IEN1 CCIE 2) IP0 IP1 ITCON Interrupt Enable Register 0 Interrupt Enable Register 1 Capture/Compare Interrupt Enable Reg. Interrupt Priority Register 0 Interrupt Priority Register 1 Interrupt Trigger Condition Register A8 H 1) A9 H D6 H B8 H 1) B9 H 9A H 0X000000 B 3) XX000000 B 3) 00 H XX000000 B 3) XX000000 B 3) 00101010 B Ports P0 P1 P1ANA 2) P2 P3 P3ANA 2) Port 0 Port 1 Port 1 Analog Input Selection Register Port 2 Port 3 Port 3 Analog Input Selection Register 80 H 1) 90 H 1) 90 H 1) 4) A0 H 1) B0 H 1) B0 H 1) 4) FF H FF H XXXX1111 B 3) FF H FF H XX1111XX B 3) A/D- Converter ADCON0 ADCON1 ADDATH ADDATL P1ANA 2) P3ANA 2) A/D Converter Control Register 0 A/D Converter Control Register 1 A/D Converter Data Register High Byte A/D Converter Data Register Low Byte Port 1 Analog Input Selection Register Port 3 Analog Input Selection Register D8H 1) DC H D9 H DA H 90 H 1) 4) B0 H 1) 4) XX000000 B 3) 01XXX000 B 3) 00 H 00XXXXXX B 3) XXXX1111 B 3) XX1111XX B 3) Serial Channels PCON 2) SBUF SCON Power Control Register Serial Channel Buffer Register Serial Channel Control Register 87 H 99 H 98 H 1) 000X0000 B XX H 3) 00 H Timer 0/ Timer 1 TCON TH0 TH1 TL0 TL1 TMOD Timer 0/1 Control Register Timer 0, High Byte Timer 1, High Byte Timer 0, Low Byte Timer 1, Low Byte Timer Mode Register 88 H 1) 8C H 8D H 8A H 8B H 89 H 00 H 00 H 00 H 00 H 00 H 00 H 1) Bit-addressable special function registers 2) This special function register is listed repeatedly since some bits of it also belong to other functional blocks. 3) X means that the value is undefined and the location is reserved 4) SFR is located in the mapped SFR area. For accessing this SFR, bit RMAP in SFR SYSCON must be set. |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
