TLF9526

January 1995

54F74F378

Parallel D Register with Enable

General Description

The ’F378 is a 6-bit register with a buffered common En-

able This device is similar to the ’F174 but with common

Enable rather than common Master Reset

Features

Y

6-bit high-speed parallel register

Y

Positive edge-triggered D-type inputs

Y

Fully buffered common clock and enable inputs

Y

Input clamp diodes limit high-speed termination effects

Y

Full TTL and CMOS compatible

Commercial

Military

Package

Package Description

Number

74F378PC

N16E

16-Lead (0300 Wide) Molded Dual-In-Line

54F378DM (QB)

J16A

16-Lead Ceramic Dual-In-Line

74F378SC (Note 1)

M16A

16-Lead (0150 Wide) Molded Small Outline JEDEC

74F378SJ (Note 1)

M16D

16-Lead (0300 Wide) Molded Small Outline EIAJ

54F378FM (QB)

W16A

16-Lead Cerpack

54F378LM (QB)

E20A

20-Lead Ceramic Leadless Chip Carrier Type C

Note 1

Devices also available in 13

Logic Symbols

Connection Diagrams

TLF9526 – 1

IEEEIEC

TLF9526 – 4

Pin Assignment for

DIP SOIC and Flatpak

TLF9526 – 2

Pin Assignment

for LCC

TLF9526 – 3

TRI-STATE

is a registered trademark of National Semiconductor Corporation

C1995 National Semiconductor Corporation

RRD-B30M75Printed in U S A