Connection Diagrams

Pin Assignment for

DIP SOIC and Flatpak

TLF9549 – 2

Pin Assignment

for LCC

TLF9549 – 3

Functional Description

The ’F534 consists of eight edge-triggered flip-flops with in-

dividual D-type inputs and TRI-STATE complementary out-

puts The buffered clock and buffered Output Enable are

common to all flip-flops The eight flip-flops will store the

state of their individual D inputs that meet the setup and

hold times requirements on the LOW-to-HIGH clock (CP)

transition With the Output Enable (OE) LOW the contents

of the eight flip-flops are available at the outputs When the

OE is HIGH the outputs go to the high impedance state

Operation of the OE input does not affect the state of the

flip-flops

Function Table

Inputs

Output

CP

OE

D

O

L

LH

L

L

LL

H

LL

X

XH

X

Z

Logic Diagram

TLF9549 – 4

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays

2