2

SCD5905 Rev A 9/22/12

Aeroflex Plainview

Notes:

1. Package and Lid are electrically isolated from signal pads.

2. It is recommended that the Lid be grounded to prevent any ESD or static buildup.

3. EN_AB enables amplifiers A & B. EN_CD enables amplifiers C & D.

FIGURE 1: BLOCK DIAGRAM

FIGURE 2: PACKAGE PIN-OUT

Pin

Signal Name

Definition

1- OUT_A

Negative Output of Amplifier A.

2+ OUT_A

Positive Output of Amplifier A.

3

-IN_A

Inverting input of Amplifier A.

4

+IN_A

Non-Inverting input of Amplifier A.

5

VCC

+ Voltage Supply.

6

+IN_B

Non-Inverting input of Amplifier B.

7

-IN_B

Inverting input of Amplifier B.

8+ OUT_B

Positive Output of Amplifier B.

9- OUT_B

Negative Output of Amplifier B.

10

EN_AB

A Logic Low will disable Amplifiers A & B

so that the outputs are high impedance.

11

EN_CD

A Logic Low will disable Amplifiers C & D

so that the outputs are high impedance.

12

- OUT_C

Negative Output of Amplifier C.

13

+ OUT_C

Positive Output of Amplifier C.

14

-IN_C

Inverting input of Amplifier C.

15

+IN_C

Non-Inverting input of Amplifier C.

16

VEE

- Voltage Supply.

17

+IN_D

Non-Inverting input of Amplifier D.

18

-IN_D

Inverting input of Amplifier D.

19

+ OUT_D

Positive Output of Amplifier D.

20

- OUT_D

Negative Output of Amplifier D.

TABLE 1: PIN-OUT DESCRIPTION

+OUT_A

+OUT_B

+OUT_C

+OUT_D

+IN_A

-IN_A

+IN_B

-IN_B

EN_AB

+IN_C

-IN_C

+IN_D

-IN_D

EN_CD

4

3

6

7

10

15

14

17

18

11

19

13

8

2

A

B

C

D

16

5

VCC

VEE

-OUT_A

-OUT_B

-OUT_C

-OUT_D

20

12

9

1

20-Pin SOIC

+OUT_D

-IN_D

+IN_D

-IN_C

-OUT_C

EN_CD

-IN_A

+IN_A

VCC

+IN_B

-IN_B

EN_AB

RHD5905

VEE

+IN_C

3

4

5

6

7

8

16

15

14

13

12

11

10

9

1

2

-OUT_D

20

19

18

17

-OUT_A

+OUT_A

+OUT_B

-OUT_B

+OUT_C