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DG540AP/883 数据表(PDF) 7 Page - TEMIC Semiconductors |
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DG540AP/883 数据表(HTML) 7 Page - TEMIC Semiconductors |
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7 / 10 page ![]() DG540/541/542 Siliconix S-53694—Rev. E, 28-May-97 7 Test Circuits Figure 2. Switching Time RL RL + rDS(on) VO = VS CL (includes fixture and stray capacitance) V– V+ IN S CL 35 pF D 3 V RL 1 k W VO –3 V GND +15 V 3 V 0 90% 50% tOFF tON VS tr <20 ns tf <20 ns Logic Input Switch Input Switch Output C +15 V Figure 3. Charge Injection ON ON OFF VO DVO INX DVO = measured voltage error due to charge injection The charge injection in coulombs is DQ = CL x DVO CL 1000 pF 3 V Vg VO –3 V D GND V+ Rg S IN V– +15 V Figure 4. Off Isolation S IN RL 75 W D Rg = 75 W VS VO 0 V, 2.4 V Off Isolation = 20 log VS VO V+ –3 V GND V– C C +15 V C = RF Bypass S RL 50 W D Rg = 50 W VS VO –3 V GND V+ V– C Figure 5. Bandwidth IN 0 V, 2.4 V |
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