Future Technology Devices Intl.

FT8U232AM Preliminary Information Rev 0.8 – Subject to Change

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Dual Port RX Buffer ( 384 bytes )

Data from the UART receive register is stored in the Dual Port RX buffer prior to being removed by the

SIE on a USB request for data from the device data in endpoint.

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UART FIFO Controller

The UART FIFO controller handles the transfer of data between the Dual Port RX and TX buffers and the

UART transmit and receive registers.

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UART

The UART performs asynchronous 7 / 8 bit Parallel to Serial and Serial to Parallel conversion of the data

on the RS232 ( RS422 and RS485 ) interface. Control signals supported by the UART include RTS, CTS,

DSR , DTR, DCD and RI. The UART provides a transmitter enable control signal ( TXDEN ) to assist

with interfacing to RS485 transceivers.

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Baud Rate Generator

The Baud Rate Generator provides a x16 clock input to the UART from the 48MHz reference clock and

consists of a 14 bit prescaler and 2 register bits which provide fine tuning of the baud rate ( e.g. to divide

by 2.5 ). This determines the Baud Rate of the UART which is programmable from 300 baud to 2 million

baud. For more details please contact FTDI.

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EEPROM Interface

Though the FT8U232AM will work without the optional EEPROM, an external 93C46 EEPROM can be

used to customise the USB VID, PID, Serial Number and Strings of the FT8U232AM for OEM

applications. The EEPROM is also required for applications where multiple FT8U232AM’s are connected

to a single PC as the drivers rely on a unique serial number for each device to bind a unique virtual COM

port to each individual device.