ATTINY13 datasheet(21/169 Pages) ATMEL

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ATtiny13

2535B–AVR–01/04

Clock Sources

The device has the following clock source options, selectable by Flash Fuse bits as

shown below. The clock from the selected source is input to the AVR clock generator,

and routed to the appropriate modules.

Note:

1. For all fuses “1” means unprogrammed while “0” means programmed.

The various choices for each clocking option is given in the following sections. When the

CPU wakes up from Power-down or Power-save, the selected clock source is used to

time the start-up, ensuring stable Oscillator operation before instruction execution starts.

When the CPU starts from reset, there is an additional delay allowing the power to reach

a stable level before commencing normal operation. The Watchdog Oscillator is used

for timing this real-time part of the start-up time. The number of WDT Oscillator cycles

used for each time-out is shown in Table 3.

Default Clock Source

The device is shipped with CKSEL = “10”, SUT = “10”, and CKDIV8 programmed. The

default clock source setting is therefore the Internal RC Oscillator running at 9.6 MHz

with longest start-up time and an initial system clock prescaling of 8. This default setting

ensures that all users can make their desired clock source setting using an In-System or

High-voltage Programmer.

Table 2. Device Clocking Options Select

(1)

Device Clocking Option

CKSEL1..0

Calibrated Internal RC Oscillator

01, 10

External Clock

128 kHz Internal Oscillator

Table 3. Number of Watchdog Oscillator Cycles

Typ Time-out

Number of Cycles

4 ms

512

64 ms

8K (8,192)

ATTINY13 数据表(PDF) 21 Page - ATMEL Corporation

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