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ICS87972I 数据表(PDF) 9 Page - Integrated Circuit Systems |
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ICS87972I 数据表(HTML) 9 Page - Integrated Circuit Systems |
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9 / 14 page ![]() 87972DYI www.icst.com/products/hiperclocks.html REV. A OCTOBER 18, 2002 9 Integrated Circuit Systems, Inc. ICS87972I LOW SKEW, 1-TO-12 LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER PARAMETER MEASUREMENT INFORMATION CYCLE-TO-CYCLE JITTER 3.3V OUTPUT LOAD AC TEST CIRCUIT SCOPE Qx LVCMOS V DD, VDDA, VDDO = 1.65V±5% GND = -1.65V±5% OUTPUT SKEW STATIC PHASE OFFSET OUTPUT RISE/FALL TIME tsk(o) V DDO 2 V DDO 2 Qy Qx t PW & tPeriod t PW t PERIOD V DDO 2 V DDO 2 V DDO 2 t PW t PERIOD odc = QA0:QA3, QB0:QB3, QC0:QC3, QSYNC, QFB QA0:QA3, QB0:QB3, QC0:QC3, QSYNC, QFB ➤ ➤ V DDO 2 V DDO 2 V DDO 2 tcycle n tcycle n+1 tjit(cc) = tcycle n –tcycle n+1 1000 Cycles Clock Outputs 0.5V 2.4V 2.4V 0.5V t R t F ➤t(Ø) V DD /2 V DD /2 CLK0, CLK1 EXT_FB (where t (Ø) is any random sample, and t(Ø) mean is the average of the sampled cycles measured on controlled edges) t(Ø) mean = Static Phase Offset |
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