UCS2112 datasheet(21/64 Pages) MICROCHIP

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DS20005424B-page 21

UCS2112

5.1.1

OFF STATE OPERATION

The device will be in the Off state if VDD is less than

VDD_TH. When the UCS2112 is in the Off state, it will do

nothing and all circuitry will be disabled. Digital register

values are not stored and the device will not respond to

SMBus commands.

5.1.2

SLEEP STATE OPERATION

The PWR_EN1 and PWR_EN2 pins may be used to

cause the UCS2112 to enter/exit Sleep. These pins are

AND’ed for Sleep mode.

When the UCS2112 is in the Sleep state, the device will

be in its lowest-power state. The bypass switch and the

port power switch will be disabled. The Attach and

Removal Detection feature will be disabled. VBUS1 and

VBUS2 will be near ground potential. The ALERT#1

and ALERT#2 pins will not be asserted. If asserted

prior to entering the Sleep state, the ALERT# pin will be

released. SMBus activity is limited to single byte read

or write.

The first data byte read from the UCS2112 when it is in

the Sleep state will wake it; however, the data to be

read will return all 0’s and should be considered invalid.

This is a “dummy” read byte meant to wake the

UCS2112. Subsequent read or write bytes will be

accepted normally. After the dummy read, the

UCS2112 will be in a higher-power state (see

Figure 5-2). After communication has not occurred for

tIDLE_SLEEP, the UCS2112 will return to Sleep.

FIGURE 5-2:

Wake from Sleep using SMBus Read.

Active

enabled

disabled

N/A

Yes

• Port power switch is on during A_DET1=1 for VBUS1.

VBUS2 pins have very low current delivery capability.

disabled

enabled

N/A

Yes

• Port power switch is on during A_DET2=1 for VBUS2.

•VBUS1 pins have very low current delivery capability.

enabled

N/A

Yes

• Port power switch is on during A_DET1=A_DET2=1

for VBUS1 and VBUS2.

enabled

disabled

N/A

• Forced ACTIVE Power State: Port power switch is on

at all times for VBUS1.

•VBUS2 pins have very low current delivery capability.

disabled

enabled

disabled

N/A

• Forced ACTIVE Power State: Port power switch is on

at all times for VBUS2.

•VBUS1 pins have very low current delivery capability.

enabled

disabled

N/A

• Forced ACTIVE Power State: Port power switch is on

at all times for VBUS1 and VBUS2.

TABLE 5-2:

POWER STATES CONTROL SETTINGS (CONTINUED)

Power

State

PWR_EN1 PWR_EN2 ATT_DET

Portable

Device

Attached

Behavior

0101_1110 A

invalid dataN P

SMBus Read

0001_0000

0101_1110 A

valid data N P

0001_0000

tIDLE_SLEEP

Sleep

Dummy read returns invalid data

and places device in temporary

Active state

Read returns valid data

0101_1111 A

Power State

temporary Active state

(not all functionality available)

tSMB_WAKE

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