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LS832 数据表(PDF) 2 Page - Linear Integrated Systems

部件名 LS832
功能描述  ULTRA LOW LEAKAGE LOW DRIFT MONOLITHIC DUAL N-CHANNEL JFET AMPLIFIER
PDF  2 Pages
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制造商  LINEAR [Linear Integrated Systems]
网页  http://www.linearsystems.com
标志 LINEAR - Linear Integrated Systems

LS832 数据表(HTML) 2 Page - Linear Integrated Systems

  LS832 Datasheet HTML 1Page - Linear Integrated Systems LS832 Datasheet HTML 2Page - Linear Integrated Systems  
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Linear Integrated Systems
• 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
Doc 201127 05/01/2014 Rev#A6 ECN# LS830 LS831 LS832 LS833
SYMBOL
CHARACTERISTIC
MIN.
TYP.
MAX.
UNITS
CONDITIONS
GATE-SOURCE
VGS(off)
Cutoff Voltage
-0.6
-2
-4.5
V
VDS= 10V
ID= 1nA
VGS
Operating Range
--
--
-4
V
VDG= 10V
ID= 30µA
GATE CURRENT
IGGO
Gate-to-Gate Leakage
--
1
--
pA
VGG= ±20V
ID = IS = 0A
OUTPUT CONDUCTANCE
gOSS
Full Conduction
--
--
5
µS
VDG= 10V
VGS= 0
gOS
Operating
--
--
0.5
µS
VDG= 10V
ID= 30µA
│gOS 1-2
Differential
--
--
0.1
µS
COMMON MODE REJECTION
CMRR
-
20 log │ΔVGS1-2/ ΔVDS
--
90
--
dB
ΔVDS= 10 to 20V
ID=30µA
CMRR
-
20 log │ΔVGS1-2/ ΔVDS
--
90
--
dB
ΔVDS= 5 to 10V
ID=30µA
NOISE
NF
Figure
--
--
1
dB
VDS= 10V
VGS= 0
RG
=10MΩ
f= 100Hz
NBW= 6Hz
en
Voltage
--
20
70
nV/√Hz VDG= 10V
ID= 30µA
f= 10Hz
NBW= 1Hz
CAPACITANCE
CISS
Input
--
--
3
pF
VDS= 10V
VGS= 0
f= 1MHz
CRSS
Reverse Transfer
--
--
1.5
pF
VDS= 10V
VGS= 0
f= 1MHz
CDD
Drain-to-Drain
--
--
0.1
pF
VDG= 10V
ID= 30µA
Linear Integrated Systems (LIS) is a 25-year-old, third-generation precision semiconductor company providing high-quality
discrete components. Expertise brought to LIS is based on processes and products developed at Amelco, Union Carbide, Intersil
and Micro Power Systems by company President John H. Hall. Hall, a protégé of Silicon Valley legend Dr. Jean Hoerni, was the
director of IC Development at Union Carbide, Co-Founder and Vice President of R&D at Intersil, and Founder/President of Micro
Power Systems.
NOTES:
1.
These ratings are limiting values above which the serviceability of any semiconductor may be impaired
Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its use;
nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Linear Integrated Systems.
0.210
0.170
Note: All Dimensions in inches
TO-71
TO-78
P-DIP
SOIC



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