’LS163 Switching Characteristics

From (Input)

Symbol

Parameter

To (Output)

Units

Min

Max

Min

Max

Propagation Delay Time

Clock to Any Q

24

30

ns

Low to High Level Output

(Load Low)

Propagation Delay Time

Clock to Any Q

27

38

ns

High to Low Level Output

(Load Low)

Propagation Delay Time

Enable T to

14

27

ns

Low to High Level Output

Ripple Carry

Propagation Delay Time

Enable T to

15

27

ns

High to Low Level Output

Ripple Carry

Propagation Delay Time

Clear to Any Q

28

45

ns

High to Low Level Output

(Note 1)

Note 1

The propagation delay clear to output is measured from the clock input transition

Logic Diagram

LS163A

TLF6397 – 2

The LS161A is similar however the clear buffer is connected directly to the flip flops

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