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SP503CF 数据表(PDF) 7 Page - Sipex Corporation |
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SP503CF 数据表(HTML) 7 Page - Sipex Corporation |
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7 / 29 page  7 Date: 7/29/04 SP503 Multiprotocol Transceiver © Copyright 2004 Sipex Corporation Pin 71 — RD(b) — Receive Data; analog input; non-inverted; source for RxD. Pin 76 — SCT(a) — Serial Clock Transmit; analog input, inverted; source for SCT. Pin 77 — SCT(b) — Serial Clock Transmit: analog input, non–inverted; source for SCT Pin 79 — SCT — Serial Clock Transmit; TTL output; sources from SCT(a) and SCT(b) inputs. CONTROL LINE GROUP Pin 13 — DTR — Data Terminal Ready; TTL input; source for TR(a) and TR(b) outputs. Pin 16 — RTS — Ready To Send; TTL input; source for RS(a) and RS(b) outputs. Pin 17 — RL — Remote Loopback; TTL input; source for RL(a) and RL(b) outputs. Pin 19 — DCD— Data Carrier Detect; TTL output; sourced from RR(a) and RR(b) inputs. Pin 21 — RI — Ring In; TTL output; sourced from IC(a) and IC(b) inputs. Pin 24 — LL — Local Loopback; TTL input; source for LL(a) and LL(b) outputs. Pin 35 — RR(a)— Receiver Ready; analog input, inverted; source for DCD. Pin 36 — RR(b)— Receiver Ready; analog input, non-inverted; source for DCD. Pin 39 — IC(a)— Incoming Call; analog input, inverted; source for RI. Pin 40 — IC(b)— Incoming Call; analog input, non-inverted; source for RI. Pin 45 — RL(b) — Remote Loopback; analog output, non-inverted; sourced from RL. Pin 47 — RL(a) — Remote Loopback; analog output inverted; sourced from RL. Pin 49— LL(b) — Local Loopback; analog output, non-inverted; sourced from LL. Pin 51 — LL(a) — Local Loopback; analog output, inverted; sourced from LL. Pin 52 — RS(b) — Ready To Send; analog output, non-inverted; sourced from RTS. Pin 54 — RS(a) — Ready To Send; analog output, inverted; sourced from RTS. Pin 56 — TR(b) — Terminal Ready; analog output, non-inverted; sourced from DTR. Pin 58 — TR(a) — Terminal Ready; analog output, inverted; sourced from DTR. Pin 66 — CS(a)— Clear To Send; analog input, inverted; source for CTS. Pin 67 — CS(b)— Clear To Send; analog input, non-inverted; source for CTS. Pin 68 — DM(a)— Data Mode; analog input, inverted; source for DSR. Pin 69 — DM(b)— Data Mode; analog input, non-inverted; source for DSR Pin 78 — DSR— Data Set Ready; TTL output; sourced from DM(a), DM(b) inputs. Pin 80 — CTS— Clear To Send; TTL output; sourced from CS(a) and CS(b) inputs. CONTROL REGISTERS Pins 2–5 — RDEC 0 – RDEC3 — Receiver decode register; configures receiver modes; TTL inputs. Pin 6 — TTEN — Enables TT driver, active low; TTL input. Pin 7 — SCTEN — Enables SCT receiver; active high; TTL input. Pins 12–9 — TDEC 0 – TDEC3 — Transmitter decode register; configures transmitter modes; TTL inputs. Pin 23 — STEN — Enables ST driver; active low; TTL input. POWER SUPPLIES Pins 8, 25, 33, 41, 48, 55, 62, 73, 74 — V CC — +5V input. Pins 29, 34, 43, 46, 50, 53, 57, 60, 64, 72, 75 — GND — Ground. Pin 27 — V DD +10V Charge Pump Capacitor — Connects from V DD to VCC. Suggested capaci- tor size is 22 µF, 16V. |
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