rev. 7/7/03

SP508 Evaluation Board Manual

© Copyright 2003 Sipex Corporation

2

D0

19

D1

20

D2

21

LOOPBACK 27

LATCH

23

TERM_OFF 22

V35TGND1 99

V35TGND1 94

V35TGND1 89

V35TGND1 46

V35TGND1 58

73

72

C1+

69

C1-

70

C2+

67

C2-

GND * *

GND

GND

GND

2

2

2

2

2

1

1

1

1

1

105

115

114

106

107

109

125

142

3

16

17

9

15&

12&

5

13

6

22

8&

10&

22

25

2

14

24

11

4

19

20

23

21

18

25-Pin D-Sub

Connector Pins

1µF

1µF

1µF

1µF

10µF

103

113

113

105

108

109

140

141

TxD

TxCE

ST

RTS

DTR

RL

LL

28

29

30

31

32

33

34

35

97

100

92

95

87

90

83

85

75

78

81

79

65

63

SD(a)

SD(b)

TT(a)

TT(b)

ST(a)

ST(b)

RS(a)

RS(b)

TR(a)

TR(b)

RRC(a)

RRC(b)

RL(a)

LL(a)

RxD

RxC

TxC

CTS

DSR

RI

TM

36

37

38

39

40

41

42

43

48

47

50

49

53

51

55

54

57

56

60

59

61

62

SD(a)

SD(b)

TT(a)

TT(b)

ST(a)

ST(b)

RS(a)

RS(b)

TR(a)

TR(b)

RRC(a)

RRC(b)

RL(a)

LL(a)

3

SDEN

4

TTEN

5

STEN

6

RSEN

7

TREN

8

RRSEN

9

RLEN

10 LLEN

11 RDEN

12 RTEN

13 TxCEN

14 CSEN

15 DMEN

16 RRTEN

17 ICEN

18 TMEN

DECODER

MODE

D0

D1

D2

SHUTDOWN

1

1

1

V.35

0

0

1

EIA-530

0

1

0

RS-232

0

1

1

EIA-530A

1

0

0

RS-449

1

0

1

X.21

1

1

0

Driver applies for DCE only on pins 5 and 12.

Receiver applies for DTE only on Pins 5 and 12.

Driver applies for DCE only on Pins 8 and 10.

Receiver applies for DTE only on Pins 8 and 10.

* Pins 1,26,45,64,71,77,80,84,88,93,98 = VCC

** Pins 2,25,44,52,68,74,82,86,91,96 = GND

Pins 24 and 76 are no connects.

Circuit #

10

01

Connect jumper to enable internal cable termination

1

Logic high

0

Logic low

ON

Loopback

OFF

No Loopback

Figure 1