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SP706PCP 数据表(PDF) 12 Page - Sipex Corporation |
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SP706PCP 数据表(HTML) 12 Page - Sipex Corporation |
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12 / 18 page ![]() 12 Rev. 10-17-00 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits © Copyright 2000 Sipex Corporation Ensuring a Valid RESET Output Down to V CC = 0V When V CC falls below 1V, the RESET output no longer sinks current, it becomes an open circuit. High-impedance CMOS logic inputs can drift to undetermined voltages if left undriven. If a pull- down resistor is added to the RESET pin, any stray charge or leakage currents will be shunted to ground, holding RESET LOW. The resistor value is not critical. It should be about 100K Ω, large enough not to load RESET and small enough to pull RESET to ground. Monitoring Voltages Other Than the Unregulated DC Input Monitor voltages other than the unregulated DC by connecting a voltage divider to PFI and adjusting the ratio appropriately. If required, add hysteresis by connecting a resistor (with a value approximately 10 times the sum of the two resistors in the potential divider network) between PFI and PFO. A capacitor between PFI and GND will reduce the power-fail circuit's sensitivity to high-frequency noise on the line being monitored. RESET can be used to monitor voltages other than the +3.3V/+3.0V V CC line. Connect PFO to MR to initiate a RESET pulse when PFI drops below 1.25V. Figure 17 shows the SP706R/S/T-SP708R/ S/T series configured to assert RESET when the +3.3V/+3.0V supply falls below the RESET threshold, or when the +12V supply falls below approximately 11V. Monitoring a Negative Voltage Supply The power-fail comparator can also monitor a negative supply rail, shown in Figure 18. When the negative rail is good (a negative voltage of large magnitude), PFO is LOW. By adding the resistors and transistor as shown, a HIGH PFO triggers RESET. As long as PFO remains HIGH, the SP706P/R/S/T-SP708R/S/ T series will keep RESET asserted (where RESET = LOW and RESET = HIGH). Note that this circuit's accuracy depends on the PFI threshold tolerance, the V CC line, and the resis- tors. Interfacing to mPs with Bidirectional RESET Pins µPs with bidirectional RESET pins, such as the Motorola 68HC11 series, can contend with the RESET output. If, for example, the RESET PFI PFO VCC +3.3V/+3.0V GND RESET to µP MR +12V 1M Ω 1% 130K Ω 1% Figure 17. Monitoring Both +3.3V/+3.0V and +12V Power Supplies GND GND RESET INTERRUPT I/O LINE VCC RESET PFO PFI R2 R1 Unregulated DC Power Supply Regulated +3.3V/+3.0V Power Supply VCC 0.1 µF PFI µP NMI WDO PUSHBUTTON SWITCH MR Figure 16. Typical Operating Circuit |
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