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SP8107 数据表(PDF) 2 Page - Sipex Corporation

部件名 SP8107
功能描述  Three Channel High Performance Laser Driver
PDF  3 Pages
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制造商  SIPEX [Sipex Corporation]
网页  http://www.sipex.com
标志 SIPEX - Sipex Corporation

SP8107 数据表(HTML) 2 Page - Sipex Corporation

  SP8107 Datasheet HTML 1Page - Sipex Corporation SP8107 Datasheet HTML 2Page - Sipex Corporation SP8107 Datasheet HTML 3Page - Sipex Corporation  
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Advanced
SP8107
Rev. 09/05/03
SP8107 – Three Channel Laser Driver
Copyright 2003 Sipex Corporation
SIPEX RESERVES THE RIGHT TO MAKE CHANGES TO THIS DATASHEET. CALL FOR UPDATES: 1-978-667-8700.
SIPEX CONFIDENTIAL, ADVANCED & PROPRIETARY. DO NOT DISTRIBUTE OR
COPY
page
2 of 3
PIN ASSIGNMENTS
Pin
Number
Pin
Name
Pin Function
1
IR
Read Channel current controlled input
2
I2
Write Channel 2 current controlled input
3
I3
Write Channel 3 current controlled input
4
RF
Connection of an external resistor to GND to set oscillator frequency
5
EN2
Write Channel 2 enable input with an internal pull-up resistor. Logic high or
floating turns channel off.
6
EN3
Write Channel 3 enable input with an internal pull-up resistor. Logic high or
floating turns channel off.
7
ENABLE
Common device enable input with pull-down resistor. Logic low or floating
turns device off.
8
OSCEN
Oscillator enable input with pull-down resistor. Logic low or floating turns
oscillator off.
9
Vcc
Supply voltage. Bypass to GND with 0.1uF ceramic capacitor
10
SELA
Output select input with pull-down resistor. Logic high selects output A, low or
floating selects output B
11
IOUT B
Output current source B for a laser diode
12
RSB
Connection of an external resistor to GND to set oscillator swing at the output B
13
RSA
Connection of an external resistor to GND to set oscillator swing at the output A
14
GND
Ground pin
15
IOUT A
Output current source A for a laser diode
16
Vcc
Supply voltage. Bypass to GND with ceramic capacitors 0.1 and 0.01uF in
parallel
BOARD LAYOUT AND GROUNDING
To obtain the best performance from the SP8107, a printed circuit board with ground plane is required.
Layout should ensure that analog signal lines (IR, I2, and I3) are separated as much as possible from
digital and output power lines. Output power lines should be as short and wide as possible. High quality,
low series resistance ceramic 0.1 and 0.01uF bypass capacitors should be used at the Vcc pins 9 and 16.
These capacitors must be located as close to the pins as possible. The traces connecting the pins and the
bypassing capacitors must be kept short and should be made as wide as possible.



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