Date: 5/25/04

SP691A/693A/800L/800M Low Power Microprocessor Supervisor with Battery Switch-Over © Copyright 2004 Sipex Corporation

8

Pin 1 — V

to the external battery supply or super-

charging capacitor and charging circuit. If a

backup battery is not provided, connect this

pin to ground.

Pin 2 —V

connects to V

V

When V

below V

below the reset threshold, V

V

to GND.

Pin 3 — V

Pin 4 — GND — Ground reference for all

signals.

Pin 5 — BATT ON — Battery On Output. Goes

high when V

when V

of a PNP through a current-limiting resistor

to BATT ON for V

greater than 250mA.

Pin 6 — LOWLINE — Low Line Output. This

output pin goes LOW when V

the reset threshold voltage. This output pin

returns to it's HIGH output as soon as V

CC

rises above the reset threshold voltage.

PINOUT

Pin 7 — OSC

When OSC

unconnected or driven

HIGH, a 10

µA pull-up connects from V

OUT

to this input pin, the internal oscillator sets

the reset and watchdog timeout periods, and

this input pin selects between fast and slow

watchdog timeout periods. When OSC

driven LOW, the reset and watchdog timeout

periods may be set either by a capacitor from

this input pin to ground or by an external

clock at this pin (refer to Figure 21).

Pin 8 — OSC

When

OSC

internal oscillator sets the reset delay and

watchdog timeout period. When OSC

driven LOW, the external oscillator input

pin, OSC

This input pin has a 10

µA internal pull-up.

Pin 9 — PFI — Power-Fail Input. This is the

noninverting input to the power-fail

comparator. When PFI is less than 1.25V,

PFO goes low. Connect PFI to GND or

V

Pin 10 — PFO — Power-Fail Output. This is

the output of the power-fail comparator.

PFO goes low when PFI is less than 1.25V.

This is an uncommitted comparator, and

has no effect on any other internal circuitry.

Pin 11 — WDI — Watchdog Input. This is a

three-level input pin. If WDI remains either

HIGH or LOW for longer than the watchdog

timeout period, WDO goes LOW and RESET

is asserted for the reset timeout period. WDO

remains LOW until the next transition at this

input pin. Leaving this input pin unconnected

disables the watchdog function. This input

pin connects to an internal voltage divider

between V

mid-supply when left unconnected.

Vcc

GND

BATT ON

PFO

PFI

RESET

WDO

WDI

LOWLINE

16

DIP/SO

TOP VIEW

15

14

13

12

11

10

9

1

2

3

4

5

6

7

8

Corporation

RESET

PIN ASSIGNMENTS