9324 datasheet(3/6 Pages) NSC

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Switching Characteristics

VCC ea50V TA ea25 C (See Section 1 for waveforms and load configurations)

Symbol

Parameter

CL e 15 pF

Units

Min

Max

tPLH

Propagation Delay

tPHL

E to A e B14

tPLH

Propagation Delay

tPHL

An Bn to A l B22

tPLH

Propagation Delay

tPHL

An Bn to A k B21

tPLH

Propagation Delay

tPHL

An Bn to A e B32

Functional Description

The ’24 5-bit comparators use combinational circuitry to di-

rectly generate ‘‘A greater than B’’ and ‘‘A less than B’’

outputs As evident from the logic diagram these outputs

are generated in only three gate delays The ‘‘A equals B’’

output is generated in one additional gate delay by decoding

the ‘‘A neither less than nor greater than B’’ condition with a

NOR gate All three outputs are activated by the active LOW

Enable Input (E)

Tying the A l B output from one device into an A input on

another device and the A k B output into the corresponding

B input permits easy expansion

The A4 and B4 inputs are the most significant inputs and

A0 B0 the least significant Thus if A4 is HIGH and B4 is

LOW the A l B output will be HIGH regardless of all other

inputs except E

Truth Table

Inputs

Outputs

A k BA l BA e B

Word A e Word B

Word A l Word B

Word B l Word A

H e HIGH Voltage Level

L e LOW Voltage Level

X e Immaterial

Logic Symbol

TLF9792 – 2

VCC e Pin 16

GND e Pin 6

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